View ADC08131-13_9083350.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

obsolete adc08131 , adc08134 , adc08138 www.ti.com snas066d ? june 1999 ? revised april 2013 adc08131/adc08134/adc08138 8-bit high-speed serial i/o a/d converters with multiplexer options, voltage reference, and track/hold function check for samples: adc08131 , adc08134 , adc08138 1 features description the adc08131/adc08134/adc08138 are 8-bit 23 ? serial digital data link requires few i/o pins successive approximation a/d converters with serial ? analog input track/hold function i/o and configurable input multiplexers with up to 8 ? 4- or 8-channel input multiplexer options with channels. the serial i/o is configured to comply with address logic the microwire serial data exchange standard for easy interface to the cops ? family of controllers, ? on-chip 2.5v band-gap reference ( 2% over and can easily interface with standard shift registers temperature ensured) or microprocessors. ? no zero or full scale adjustment required all three devices provide a 2.5v band-gap derived ? ttl/cmos input/output compatible reference with ensured performance over ? 0v to 5v analog input range with single 5v temperature. power supply a track/hold function allows the analog voltage at the positive input to vary during the actual a/d applications conversion. ? digitizing automotive sensors the analog inputs can be configured to operate in ? process control/monitoring various combinations of single-ended, differential, or pseudo-differential modes. in addition, input voltage ? remote sensing in noisy environments spans as small as 1v can be accommodated. ? embedded diagnostics key specifications ? resolution: 8 bits ? conversion time (f c = 1 mhz): 8 s (max) ? power dissipation: 20 mw (max) ? single supply: 5 v dc ( 5%) ? total unadjusted error: ? lsb and 1 lsb ? linearity error (v ref = 2.5v): ? lsb ? no missing codes (over temperature) ? on-board reference: +2.5v 1.5% (max) 1 please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2 cops is a trademark of texas instruments. 3 all other trademarks are the property of their respective owners. production data information is current as of publication date. copyright ? 1999 ? 2013, texas instruments incorporated products conform to specifications per the terms of the texas instruments standard warranty. production processing does not necessarily include testing of all parameters.
obsolete adc08131 , adc08134 , adc08138 snas066d ? june 1999 ? revised april 2013 www.ti.com connection diagrams figure 1. adc08138ciwm small outline packages figure 2. adc08134ciwm small outline packages figure 3. adc08131ciwm small outline package 2 submit documentation feedback copyright ? 1999 ? 2013, texas instruments incorporated product folder links: adc08131 adc08134 adc08138
obsolete adc08131 , adc08134 , adc08138 www.ti.com snas066d ? june 1999 ? revised april 2013 these devices have limited built-in esd protection. the leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the mos gates. absolute maximum ratings (1) (2) (3) supply voltage (v cc ) 6.5v voltage at inputs and outputs ? 0.3v to v cc + 0.3v input current at any pin (4) 5 ma package input current (4) 20 ma power dissipation at t a = 25 c (5) 800 mw esd susceptibility (6) 1500v n package (10 sec.) 260 c soldering information vapor phase (60 sec.) 215 c soic package infrared (15 sec.) 220 c storage temperature ? 65 c to +150 c (1) all voltages are measured with respect to agnd = dgnd = 0 v dc , unless otherwise specified. (2) absolute maximum ratings indicate limits beyond which damage to the device may occur. (3) if military/aerospace specified devices are required, please contact the texas instruments sales office/ distributors for availability and specifications. (4) when the input voltage (v in ) at any pin exceeds the power supplies (v in < (agnd or dgnd) or v in > av cc ) the current at that pin should be limited to 5 ma. the 20 ma maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 5 ma to four pins. (5) the maximum power dissipation must be derated at elevated temperatures and is dictated by t jmax , ja and the ambient temperature, t a . the maximum allowable power dissipation at any temperature is p d = (t jmax ? t a )/ ja or the number given in the absolute maximum ratings, whichever is lower. for these devices t jmax = 125 c. the typical thermal resistances ( ja ) of these parts when board mounted for the adc 08131 and the adc08134 is 140 c/w and 91 c/w for the adc08138. (6) human body model, 100 pf capacitor discharged through a 1.5 k resistor. operating ratings (1) (2) temperature range (t min t a t max ) ? 40 c t a +85 c supply voltage (v cc ) 4.5 v dc to 6.3 v dc (1) operating ratings indicate conditions for which the device is functional. these ratings do not ensure specific performance limits. for ensured specifications and test conditions, see the electrical characteristics . the ensured specifications apply only for the test conditions listed. some performance characteristics may degrade when the device is not operated under the listed test conditions. (2) all voltages are measured with respect to agnd = dgnd = 0 v dc , unless otherwise specified. copyright ? 1999 ? 2013, texas instruments incorporated submit documentation feedback 3 product folder links: adc08131 adc08134 adc08138
obsolete adc08131 , adc08134 , adc08138 snas066d ? june 1999 ? revised april 2013 www.ti.com electrical characteristics the following specifications apply for v cc = +5 v dc , v ref = +2.5 v dc and f clk = 1 mhz unless otherwise specified. boldface limits apply for t a = t j = t min to t max ; all other limits t a = t j = 25 c. units symbol parameter conditions typical (1) limits (2) (limits) converter and multiplexer characteristics linearity error v ref = +2.5 v dc 1 lsb (max) full scale error v ref = +2.5 v dc 1 lsb (max) zero error v ref = +2.5 v dc 1 lsb (max) total unadjusted error v ref = +5 v dc (3) 1 lsb (max) differential linearity v ref = +2.5 v dc 8 bits (min) 3.5 k r ref reference input resistance see (4) 1.3 k (min) 6.0 k (max) (v cc + 0.05) v (max) v in analog input voltage see (5) (gnd ? 0.05) v (min) dc common-mode error v ref = 2.5 v dc ? lsb (max) v cc = +5v 5%, power supply sensitivity ? lsb (max) v ref = +2.5 v dc on channel = 5v, 0.2 a (max) off channel = 0v 1 on channel leakage current (6) on channel = 0v, ? 0.2 a (max) off channel = 5v ? 1 on channel = 5v, ? 0.2 a (max) off channel = 0v ? 1 off channel leakage current (6) on channel = 0v, 0.2 a (max) off channel = 5v 1 digital and dc characteristics v in(1) logical ? 1 ? input voltage v cc = 5.25v 2.0 v (min) v in(0) logical ? 0 ? input voltage v cc = 4.75v 0.8 v (max) i in(1) logical ? 1 ? input current v in = 5.0v 1 a (max) i in(0) logical ? 0 ? input current v in = 0v ? 1 a (max) v cc = 4.75v: v out(1) logical ? 1 ? output voltage i out = ? 360 a 2.4 v (min) i out = ? 10 a 4.5 v (min) v cc = 4.75v 0.4 v (max) v out(0) logical ? 0 ? output voltage i out = 1.6 ma (1) typicals are at t j = 25 c and represent the most likely parametric norm. (2) ensured to aoql (average outgoing quality level). (3) total unadjusted error includes zero, full-scale, linearity, and multiplexer error. total unadjusted error with v ref = +5v only applies to the adc08134 and adc08138. see note 7 on the following page. (4) cannot be tested for the adc08131. (5) for v in( ? ) v in(+) the digital code will be 0000 0000. two on-chip diodes are tied to each analog input (see adc08138 simplified block diagram ) which will forward-conduct for analog input voltages one diode drop below ground or one diode drop greater than v cc supply. during testing at low v cc levels (e.g., 4.5v), high level analog inputs (e.g., 5v) can cause an input diode to conduct, especially at elevated temperatures. this will cause errors for analog inputs near full-scale. the specification allows 50 mv forward bias of either diode; this means that as long as the analog v in does not exceed the supply voltage by more than 50 mv, the output code will be correct. exceeding this range on an unselected channel will corrupt the reading of a selected channel. achievement of an absolute 0 v dc to 5 v dc input voltage range will therefore require a minimum supply voltage of 4.950 v dc over temperature variations, initial tolerance and loading. (6) channel leakage current is measured after a single-ended channel is selected and the clock is turned off. for off channel leakage current the following two cases are considered: one, with the selected channel tied high (5 v dc ) and the remaining seven off channels tied low (0 v dc ), total current flow through the off channels is measured; two, with the selected channel tied low and the off channels tied high, total current flow through the off channels is again measured. the two cases considered for determining on channel leakage current are the same except total current flow through the selected channel is measured. 4 submit documentation feedback copyright ? 1999 ? 2013, texas instruments incorporated product folder links: adc08131 adc08134 adc08138
obsolete adc08131 , adc08134 , adc08138 www.ti.com snas066d ? june 1999 ? revised april 2013 electrical characteristics (continued) the following specifications apply for v cc = +5 v dc , v ref = +2.5 v dc and f clk = 1 mhz unless otherwise specified. boldface limits apply for t a = t j = t min to t max ; all other limits t a = t j = 25 c. units symbol parameter conditions typical (1) limits (2) (limits) v out = 0v ? 3.0 a (max) i out tri-state output current v out = 5v 3.0 a (max) i source output source current v out = 0v ? 6.5 ma (min) i sink output sink current v out = v cc 8.0 ma (min) supply current i cc adc08134, adc08138 cs = high 3.0 ma (max) adc08131 (7) 6.0 ma (max) (7) for the adc08131 v ref in is internally tied to the on chip 2.5v band-gap reference output; therefore, the supply current is larger because it includes the reference current (700 a typical, 2 ma maximum). electrical characteristics the following specifications apply for v cc = +5 v dc , and f clk = 1 mhz unless otherwise specified. boldface limits apply for t a = t j = t min to t max ; all other limits t a = t j = 25 c. units symbol parameter conditions typical (1) limits (2) (limits) reference characteristics 2.5 v ref out output voltage dc08134, adc08138 2.5 1.5% v 2% v ref / t temperature coefficient 40 ppm/ c sourcing (0 i l +4 ma) 0.003 0.1 adc08134, adc08138 sourcing (0 i l +2 ma) 0.003 0.1 adc08131 %/ma v ref / i l load regulation (3) (max) sinking ( ? 1 i l 0 ma) 0.2 0.5 adc08134, adc08138 sinking ( ? 1 i l 0 ma) 0.2 0.5 adc08131 line regulation 4.75v v cc 5.25v 0.5 6 mv (max) v ref = 0v adc08134, 8 25 ma i sc short circuit current adc08138 (max) v ref = 0v 8 25 adc08131 v cc : 0v 5v t su start-up time 20 ms c l = 100 f v ref / t long term stability 200 ppm/1 khr (1) typicals are at t j = 25 c and represent the most likely parametric norm. (2) ensured to aoql (average outgoing quality level). (3) load regulation test conditions and specifications for the adc08131 differ from those of the adc08134 and adc08138 because the adc08131 has the on-board reference as a permanent load. copyright ? 1999 ? 2013, texas instruments incorporated submit documentation feedback 5 product folder links: adc08131 adc08134 adc08138
obsolete adc08131 , adc08134 , adc08138 snas066d ? june 1999 ? revised april 2013 www.ti.com electrical characteristics the following specifications apply for v cc = +5 v dc , v ref = +2.5 v dc and t r = t f = 20 ns unless otherwise specified. boldface limits apply for t a = t j = t min to t max ; all other limits t a = t j = 25 c. symbol parameter conditions typical (1) limits (2) units (limits) 10 khz (min) f clk clock frequency 1 mhz (max) 40 % (min) clock duty cycle (3) 60 % (max) conversion time (not including 8 1/f clk (max) t c f clk = 1 mhz mux addressing time) 8 s (max) t ca acquisition time ? 1/f clk (max) t select clk high while cs is high 50 ns cs falling edge or data input t set-up 25 ns (min) valid to clk rising edge t hold data input valid after clk rising edge 20 ns (min) c l = 100 pf: t pd1 , t pd0 clk falling edge to output data valid (4) data msb first 250 ns (max) data lsb first 200 ns (max) c l = 10 pf, r l = 10 k 50 ns tri-state delay from rising edge of (see tri-state test circuits t 1h , t 0h cs to data output and sars hi-z and waveforms ) c l = 100 pf, r l = 2 k 180 ns (max) c in capacitance of logic inputs 5 pf c out capacitance of logic outputs 5 pf (1) typicals are at t j = 25 c and represent the most likely parametric norm. (2) ensured to aoql (average outgoing quality level). (3) a 40% to 60% duty cycle range insures proper operation at all clock frequencies. in the case that an available clock has a duty cycle outside of these limits the minimum time the clock is high or low must be at least 450 ns. the maximum time the clock can be high or low is 100 s. (4) since data, msb first, is the output of the comparator used in the successive approximation loop, an additional delay is built in (see adc08138 simplified block diagram ) to allow for comparator response time. 6 submit documentation feedback copyright ? 1999 ? 2013, texas instruments incorporated product folder links: adc08131 adc08134 adc08138
obsolete adc08131 , adc08134 , adc08138 www.ti.com snas066d ? june 1999 ? revised april 2013 adc08138 simplified block diagram copyright ? 1999 ? 2013, texas instruments incorporated submit documentation feedback 7 product folder links: adc08131 adc08134 adc08138
obsolete adc08131 , adc08134 , adc08138 snas066d ? june 1999 ? revised april 2013 www.ti.com typical converter performance characteristics (1) linearity error vs reference voltage linearity error vs temperature figure 4. figure 5. power supply current vs temperature linearity error vs clock frequency (adc08138, adc08134) figure 6. figure 7. output current vs temperature power supply current vs clock frequency figure 8. figure 9. (2) (1) for adc08131 add i ref (2) for the adc08131 v ref in is internally tied to the on chip 2.5v band-gap reference output; therefore, the supply current is larger because it includes the reference current (700 a typical, 2 ma maximum). 8 submit documentation feedback copyright ? 1999 ? 2013, texas instruments incorporated product folder links: adc08131 adc08134 adc08138
obsolete adc08131 , adc08134 , adc08138 www.ti.com snas066d ? june 1999 ? revised april 2013 typical reference performance characteristics load regulation (1) line regulation (3 typical parts) figure 10. figure 11. output drift vs temperature (3 typical parts) available output current vs supply voltage figure 12. figure 13. (1) load regulation test conditions and specifications for the adc08131 differ from those of the adc08134 and adc08138 because the adc08131 has the on-board reference as a permanent load. copyright ? 1999 ? 2013, texas instruments incorporated submit documentation feedback 9 product folder links: adc08131 adc08134 adc08138
obsolete adc08131 , adc08134 , adc08138 snas066d ? june 1999 ? revised april 2013 www.ti.com tri-state test circuits and waveforms figure 14. t 1h figure 15. t 1h figure 16. t 0h figure 17. t 0h timing diagrams *to reset these devices, clk and cs must be simultaneously high for a period of t select or greater. otherwise these devices are compatible with industry standards adc0831/4/8. figure 18. data input timing figure 19. data output timing 10 submit documentation feedback copyright ? 1999 ? 2013, texas instruments incorporated product folder links: adc08131 adc08134 adc08138
obsolete adc08131 , adc08134 , adc08138 www.ti.com snas066d ? june 1999 ? revised april 2013 figure 20. adc08131 start conversion timing *lsb first output not available on adc08131. lsb information is maintained for remainder of clock periods until cs goes high. figure 21. adc08131 timing figure 22. adc08134 timing copyright ? 1999 ? 2013, texas instruments incorporated submit documentation feedback 11 product folder links: adc08131 adc08134 adc08138
obsolete adc08131 , adc08134 , adc08138 snas066d ? june 1999 ? revised april 2013 www.ti.com *make sure clock edge #18 clocks in the lsb before se is taken low figure 23. adc08138 timing 12 submit documentation feedback copyright ? 1999 ? 2013, texas instruments incorporated product folder links: adc08131 adc08134 adc08138
obsolete adc08131 , adc08134 , adc08138 www.ti.com snas066d ? june 1999 ? revised april 2013 adc08138 functional block diagram *some of these functions/pins are not available with other options. for the adc08134, the ? sel 1 ? flip-flop is bypassed. for the adc08131, v refout and v refin are internally tied together. copyright ? 1999 ? 2013, texas instruments incorporated submit documentation feedback 13 product folder links: adc08131 adc08134 adc08138
obsolete adc08131 , adc08134 , adc08138 snas066d ? june 1999 ? revised april 2013 www.ti.com functional description multiplexer addressing the design of these converters utilizes a comparator structure with built-in sample-and-hold which provides for a differential analog input to be converted by a successive approximation routine. the actual voltage converted is always the difference between an assigned ? + ? input terminal and a ? ? ? input terminal. the polarity of each input terminal of the pair indicates which line the converter expects to be the most positive. if the assigned ? + ? input voltage is less than the ? ? ? input voltage the converter responds with an all zeros output code. a unique input multiplexing scheme has been utilized to provide multiple analog channels with software- configurable single-ended, differential, or pseudo-differential (which will convert the difference between the voltage at any analog input and a common terminal) operation. the analog signal conditioning required in transducer-based data acquisition systems is significantly simplified with this type of input flexibility. one converter package can now handle ground referenced inputs and true differential inputs as well as signals with some arbitrary reference voltage. a particular input configuration is assigned during the mux addressing sequence, prior to the start of a conversion. the mux address selects which of the analog inputs are to be enabled and whether this input is single-ended or differential. differential inputs are restricted to adjacent channel pairs. for example, channel 0 and channel 1 may be selected as a differential pair but channel 0 or 1 cannot act differentially with any other channel. in addition to selecting differential mode the polarity may also be selected. channel 0 may be selected as the positive input and channel 1 as the negative input or vice versa. this programmability is best illustrated by the mux addressing codes shown in the following tables for the various product options. the mux address is shifted into the converter via the di line. because the adc08131 contains only one differential input channel with a fixed polarity assignment, it does not require addressing. the common input line (com) on the adc08138 can be used as a pseudo-differential input. in this mode the voltage on this pin is treated as the ? ? ? input for any of the other input channels. this voltage does not have to be analog ground; it can be any reference potential which is common to all of the inputs. this feature is most useful in single-supply applications where the analog circuity may be biased up to a potential other than ground and the output signals are all referred to this potential. table 1. multiplexer/package options part number of analog channels number of number single-ended differential package pins adc08131 1 1 8 adc08134 4 2 14 adc08138 8 4 20 table 2. mux addressing: adc08138 single-ended mux mode mux address analog single-ended channel # start sgl/ odd/ select 0 1 2 3 4 5 6 7 com dif sign 1 0 1 1 0 0 0 + ? 1 1 0 0 1 + ? 1 1 0 1 0 + ? 1 1 0 1 1 + ? 1 1 1 0 0 + ? 1 1 1 0 1 + ? 1 1 1 1 0 + ? 1 1 1 1 1 + ? 14 submit documentation feedback copyright ? 1999 ? 2013, texas instruments incorporated product folder links: adc08131 adc08134 adc08138
obsolete adc08131 , adc08134 , adc08138 www.ti.com snas066d ? june 1999 ? revised april 2013 table 3. mux addressing: adc08138 differential mux mode mux address analog differential channel-pair # start sgl/ odd/ select 0 1 2 3 dif sign 1 0 0 1 2 3 4 5 6 7 1 0 0 0 0 + ? 1 0 0 0 1 + ? 1 0 0 1 0 + ? 1 0 0 1 1 + ? 1 0 1 0 0 ? + 1 0 1 0 1 ? + 1 0 1 1 0 ? + 1 0 1 1 1 ? + table 4. mux addressing: adc08134 (1) single-ended mux mode mux address channel # start sgl/ odd/ select 0 1 2 3 dif sign 1 1 1 0 0 + 1 1 0 1 + 1 1 1 0 + 1 1 1 1 + (1) com is internally tied to agnd differential mux mode mux address channel # start sgl/ odd/ select 0 1 2 3 dif sign 1 1 0 0 0 + ? 1 0 0 1 + ? 1 0 1 0 ? + 1 0 1 1 ? + since the input configuration is under software control, it can be modified as required before each conversion. a channel can be treated as a single-ended, ground referenced input for one conversion; then it can be reconfigured as part of a differential channel for another conversion. figure 24 illustrates the input flexibility which can be achieved. the analog input voltages for each channel can range from 50 mv below ground to 50 mv above v cc (typically 5v) without degrading conversion accuracy. copyright ? 1999 ? 2013, texas instruments incorporated submit documentation feedback 15 product folder links: adc08131 adc08134 adc08138
obsolete adc08131 , adc08134 , adc08138 snas066d ? june 1999 ? revised april 2013 www.ti.com the digital interface a most important characteristic of these converters is their serial data link with the controlling processor. using a serial communication format offers two very significant system improvements; it allows many functions to be included in a small package and it can eliminate the transmission of low level analog signals by locating the converter right at the analog sensor; transmitting highly noise immune digital data back to the host processor. to understand the operation of these converters it is best to refer to the timing diagrams and adc08138 functional block diagram and to follow a complete conversion sequence. for clarity a separate timing diagram is shown for each device. 1. a conversion is initiated by pulling the cs (chip select) line low. this line must be held low for the entire conversion. the converter is now waiting for a start bit and its mux assignment word. 2. on each rising edge of the clock the status of the data in (di) line is clocked into the mux address shift register. the start bit is the first logic ? 1 ? that appears on this line (all leading zeros are ignored). following the start bit the converter expects the next 2 to 4 bits to be the mux assignment word. 3. when the start bit has been shifted into the start location of the mux register, the input channel has been assigned and a conversion is about to begin. an interval of ? clock period is automatically inserted to allow for sampling the analog input. the sars line goes high at the end of this time to signal that a conversion is now in progress and the di line is disabled (it no longer accepts data). 4. the data out (do) line now comes out of tri-state and provides a leading zero. 5. during the conversion the output of the sar comparator indicates whether the analog input is greater than (high) or less than (low) a series of successive voltages generated internally from a ratioed capacitor array (first 5 bits) and a resistor ladder (last 3 bits). after each comparison the comparator's output is shipped to the do line on the falling edge of clk. this data is the result of the conversion being shifted out (with the msb first) and can be read by the processor immediately. 6. after 8 clock periods the conversion is completed. the sars line returns low to indicate this ? clock cycle later. 7. the stored data in the successive approximation register is loaded into an internal shift register. if the programmer prefers the data can be provided in an lsb first format [this makes use of the shift enable ( se) control line]. on the adc08138 the se line is brought out and if held high the value of the lsb remains valid on the do line. when se is forced low the data is clocked out lsb first. on devices which do not include the se control line, the data, lsb first, is automatically shifted out the do line after the msb first data stream. the do line then goes low and stays low until cs is returned high. the adc08131 is an exception in that its data is only output in msb first format. 8. all internal registers are cleared when the cs line is high and the t select requirement is met. see figure 18 . if another conversion is desired cs must make a high to low transition followed by address information. 16 submit documentation feedback copyright ? 1999 ? 2013, texas instruments incorporated product folder links: adc08131 adc08134 adc08138
obsolete adc08131 , adc08134 , adc08138 www.ti.com snas066d ? june 1999 ? revised april 2013 the di and do lines can be tied together and controlled through a bidirectional processor i/o bit with one wire. this is possible because the di input is only ? looked-at ? during the mux addressing interval while the do line is still in a high impedance state. 8 single-ended 4 differential 8 psuedo-differential mixed mode figure 24. analog input multiplexer options for the adc08138 reference considerations the v ref in pin on these converters is the top of a resistor divider string and capacitor array used for the successive approximation conversion. the voltage applied to this reference input defines the voltage span of the analog input (the difference between v in(max) and v in(min) over which the 256 possible output codes apply). the reference source must be capable of driving the reference input resistance, which can be as low as 1.3 k . for absolute accuracy, where the analog input varies between specific voltage limits, the reference input must be biased with a stable voltage source. the adc08134 and the adc08138 provide the output of a 2.5v band-gap reference at v ref out. this voltage does not vary appreciably with temperature, supply voltage, or load current (see reference timing under electrical characteristics ) and can be tied directly to v ref in for an analog input span of 0v to 2.5v. this output can also be used to bias external circuits and can therefore be used as the reference in ratiometric applications. bypassing v ref out with a 100 f capacitor is recommended. for the adc08131, the output of the on-board reference is internally tied to the reference input. consequently, the analog input span for this device is set at 0v to 2.5v. the pin v ref c is provided for bypassing purposes and biasing external circuits as suggested above. the maximum value of the reference is limited to the v cc supply voltage. the minimum value, however, can be quite small (see typical converter performance characteristics ) to allow direct conversions of transducer outputs providing less than a 5v output span. particular care must be taken with regard to noise pickup, circuit layout and system error voltage sources when operating with a reduced span due to the increased sensitivity of the converter (1 lsb equals v ref/ 256). copyright ? 1999 ? 2013, texas instruments incorporated submit documentation feedback 17 product folder links: adc08131 adc08134 adc08138
obsolete adc08131 , adc08134 , adc08138 snas066d ? june 1999 ? revised april 2013 www.ti.com reference examples figure 25. ratiometric figure 26. absolute the analog inputs the most important feature of these converters is that they can be located right at the analog signal source and through just a few wires can communicate with a controlling processor with a highly noise immune serial bit stream. this in itself greatly minimizes circuitry to maintain analog signal accuracy which otherwise is most susceptible to noise pickup. however, a few words are in order with regard to the analog inputs should the input be noisy to begin with or possibly riding on a large common-mode voltage. the differential input of these converters actually reduces the effects of common-mode input noise, a signal common to both selected ? + ? and ? ? ? inputs for a conversion (60 hz is most typical). the time interval between sampling the ? + ? input and then the ? ? ? input is ? of a clock period. the change in the common-mode voltage during this short time interval can cause conversion errors. for a sinusoidal common-mode signal this error is: where ? f cm is the frequency of the common-mode signal ? v peak is its peak voltage value ? f clk is the a/d clock frequency (1) for a 60hz common-mode signal to generate a ? lsb error ( 5 mv) with the converter running at 250khz, its peak value would have to be 6.63v which would be larger than allowed as it exceeds the maximum analog input limits. source resistance limitation is important with regard to the dc leakage currents of the input multiplexer. while operating near or at maximum speed bypass capacitors should not be used if the source resistance is greater than 1k . the worst-case leakage current of 1 a over temperature will create a 1mv input error with a 1k source resistance. an op amp rc active low pass filter can provide both impedance buffering and noise filtering should a high impedance signal source be required. 18 submit documentation feedback copyright ? 1999 ? 2013, texas instruments incorporated product folder links: adc08131 adc08134 adc08138
obsolete adc08131 , adc08134 , adc08138 www.ti.com snas066d ? june 1999 ? revised april 2013 optional adjustments zero error the zero of the a/d does not require adjustment. if the minimum analog input voltage value, v in(min) , is not ground a zero offset can be done. the converter can be made to output 0000 0000 digital code for this minimum input voltage by biasing any v in ( ? ) input at this v in(min) value. this utilizes the differential mode operation of the a/d. the zero error of the a/d converter relates to the location of the first riser of the transfer function and can be measured by grounding the v in ( ? ) input and applying a small magnitude positive voltage to the v in (+) input. zero error is the difference between the actual dc input voltage which is necessary to just cause an output digital code transition from 0000 0000 to 0000 0001 and the ideal ? lsb value ( ? lsb = 9.8mv for v ref = 5.000v dc ). full scale a full-scale adjustment can be made by applying a differential input voltage which is 1 ? lsb down from the desired analog full-scale voltage range and then adjusting the magnitude of the v ref in input for a digital output code which is just changing from 1111 1110 to 1111 1111 (see figure 31 ). this is possible only with the adc08134 and adc08138. (the reference is internally connected to v ref in of the adc08131). adjusting for an arbitrary analog input voltage range if the analog zero voltage of the a/d is shifted away from ground (for example, to accommodate an analog input signal which does not go to ground), this new zero reference should be properly adjusted first. a v in (+) voltage which equals this desired zero reference plus ? lsb (where the lsb is calculated for the desired analog span, using 1 lsb = analog span/256) is applied to selected ? + ? input and the zero reference voltage at the corresponding ? ? ? input should then be adjusted to just obtain the 00 hex to 01 hex code transition. the full-scale adjustment should be made [with the proper v in ( ? ) voltage applied] by forcing a voltage to the v in (+) input which is given by: where ? v max = the high end of the analog input range ? v min = the low end (the offset zero) of the analog range. (2) (both are ground referenced.) the v ref in (or v cc ) voltage is then adjusted to provide a code change from fe hex to ff hex . this completes the adjustment procedure. copyright ? 1999 ? 2013, texas instruments incorporated submit documentation feedback 19 product folder links: adc08131 adc08134 adc08138
obsolete adc08131 , adc08134 , adc08138 snas066d ? june 1999 ? revised april 2013 www.ti.com applications *pinouts shown for adc08138. for all other products tie to pin functions as shown. figure 27. a ? stand-alone ? hook-up for adc08138 evaluation figure 28. low-cost remote temperature sensor 20 submit documentation feedback copyright ? 1999 ? 2013, texas instruments incorporated product folder links: adc08131 adc08134 adc08138
obsolete adc08131 , adc08134 , adc08138 www.ti.com snas066d ? june 1999 ? revised april 2013 diodes are 1n914 figure 29. protecting the input *v in ( ? ) = 0.15 v ref 15% of v ref v xdr 85% of v ref figure 30. operating with ratiometric transducers copyright ? 1999 ? 2013, texas instruments incorporated submit documentation feedback 21 product folder links: adc08131 adc08134 adc08138
obsolete adc08131 , adc08134 , adc08138 snas066d ? june 1999 ? revised april 2013 www.ti.com figure 31. span adjust; 0v v in 3v figure 32. zero-shift and span adjust: 2v v in 5v 22 submit documentation feedback copyright ? 1999 ? 2013, texas instruments incorporated product folder links: adc08131 adc08134 adc08138
obsolete adc08131 , adc08134 , adc08138 www.ti.com snas066d ? june 1999 ? revised april 2013 revision history changes from revision c (april 2013) to revision d page ? changed layout of national data sheet to ti format .......................................................................................................... 19 copyright ? 1999 ? 2013, texas instruments incorporated submit documentation feedback 23 product folder links: adc08131 adc08134 adc08138
important notice texas instruments incorporated and its subsidiaries (ti) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per jesd46, latest issue, and to discontinue any product or service per jesd48, latest issue. buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. all semiconductor products (also referred to herein as ? components ? ) are sold subject to ti ? s terms and conditions of sale supplied at the time of order acknowledgment. ti warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in ti ? s terms and conditions of sale of semiconductor products. testing and other quality control techniques are used to the extent ti deems necessary to support this warranty. except where mandated by applicable law, testing of all parameters of each component is not necessarily performed. ti assumes no liability for applications assistance or the design of buyers ? products. buyers are responsible for their products and applications using ti components. to minimize the risks associated with buyers ? products and applications, buyers should provide adequate design and operating safeguards. ti does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right relating to any combination, machine, or process in which ti components or services are used. information published by ti regarding third-party products or services does not constitute a license to use such products or services or a warranty or endorsement thereof. use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from ti under the patents or other intellectual property of ti. reproduction of significant portions of ti information in ti data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. ti is not responsible or liable for such altered documentation. information of third parties may be subject to additional restrictions. resale of ti components or services with statements different from or beyond the parameters stated by ti for that component or service voids all express and any implied warranties for the associated ti component or service and is an unfair and deceptive business practice. ti is not responsible or liable for any such statements. buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements concerning its products, and any use of ti components in its applications, notwithstanding any applications-related information or support that may be provided by ti. buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause harm and take appropriate remedial actions. buyer will fully indemnify ti and its representatives against any damages arising out of the use of any ti components in safety-critical applications. in some cases, ti components may be promoted specifically to facilitate safety-related applications. with such components, ti ? s goal is to help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and requirements. nonetheless, such components are subject to these terms. no ti components are authorized for use in fda class iii (or similar life-critical medical equipment) unless authorized officers of the parties have executed a special agreement specifically governing such use. only those ti components which ti has specifically designated as military grade or ? enhanced plastic ? are designed and intended for use in military/aerospace applications or environments. buyer acknowledges and agrees that any military or aerospace use of ti components which have not been so designated is solely at the buyer ' s risk, and that buyer is solely responsible for compliance with all legal and regulatory requirements in connection with such use. ti has specifically designated certain components as meeting iso/ts16949 requirements, mainly for automotive use. in any case of use of non-designated products, ti will not be responsible for any failure to meet iso/ts16949. products applications audio www.ti.com/audio automotive and transportation www.ti.com/automotive amplifiers amplifier.ti.com communications and telecom www.ti.com/communications data converters dataconverter.ti.com computers and peripherals www.ti.com/computers dlp ? products www.dlp.com consumer electronics www.ti.com/consumer-apps dsp dsp.ti.com energy and lighting www.ti.com/energy clocks and timers www.ti.com/clocks industrial www.ti.com/industrial interface interface.ti.com medical www.ti.com/medical logic logic.ti.com security www.ti.com/security power mgmt power.ti.com space, avionics and defense www.ti.com/space-avionics-defense microcontrollers microcontroller.ti.com video and imaging www.ti.com/video rfid www.ti-rfid.com omap applications processors www.ti.com/omap ti e2e community e2e.ti.com wireless connectivity www.ti.com/wirelessconnectivity mailing address: texas instruments, post office box 655303, dallas, texas 75265 copyright ? 2013, texas instruments incorporated

▲Up To Search▲

Price & Availability of ADC08131-13

	To Download ADC08131-13 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .